During fabrication of a semiconductor integrated circuit (IC), an inter-layer dielectric (ILD) is formed as a barrier layer between a substrate and interconnect structures. The ILD helps to prevent particles in the interconnect structures and inter-metal dielectrics (IMDs) from diffusing into the substrate and therefore reduces the risk of improper functioning of various components formed within the ILD. The ILD is etched to form openings, such as contact holes or trenches, for features which are subsequently metalized to provide a conductive path for electrical signals to connect to the various components.
In some approaches, a mono silane (SiH4) or silicon tetrafluoride (SiF4) gas is introduced after a formation of the ILD for a planarization purpose. For example, SiH4 is ionized to generate plasma and form an ion beam with silicon atoms during an ion implantation process.